Faculty Research Profile
Jongeun Lee
학력
2004: Ph.D. in EECS from Seoul National University
1999: M.Sc. in EE from Seoul National University
1997: B.Sc. in EE from Seoul National University
주요 경력
2009.8-present: UNIST
2017.9-2018.8: Visiting professor at University of Toronto
2007.10-2009.8: Postdoc researcher at Arizona State University
2004.1-2007.10: Senior researcher at Samsung Electronics
2002.1-2003.4: Visiting scholar at Univ. of California-Irvine
수상/학회/외부활동
Samsung HumanTech Award (2016)
Organizing committee / Program committee member:
LCTES 2019
ASP-DAC 2018
ICCAD 2017
ASP-DAC 2017
VLSI-SoC 2017
ICCAD 2016
KCS 2013-2017
지능형 컴퓨팅 및 통합설계 연구실
Intelligent Computing and Codesign Lab
- 우리 연구실의 연구분야는 전자공학과 컴퓨터과학이 만나는 곳에 있습니다
- 연구 키워드: 가속기 설계, 이머징 기술 위한 아키텍처 및 설계도구 (인공지능/기계학습, 프로세싱-인-메모리, 암호 가속기), 딥뉴럴넷 양자화, 등
- 우리 연구실은 특히 설계자동화 (EDA) 분야에서 활발한 논문발표, 산학협력, 국제협력을 진행하고 있습니다!
- ICCL's research is at the intersection of Computer Science (CS) and EE (Electrical Engineering).
- Research Keywords: Accelerator Design, Architecture and Tools for Emerging Technology (AI/ML, Processing-in-Memory, Cryptography), Embedded Machine Learning (e.g., Quantization), and more
- We are active in the Electronic Design Automation (EDA) community, with strong academic presence, industrial collaboration, and international networking.
- ICCL's research is at the intersection of Computer Science (CS) and EE (Electrical Engineering).
- Research Keywords: Accelerator Design, Architecture and Tools for Emerging Technology (AI/ML, Processing-in-Memory, Cryptography), Embedded Machine Learning (e.g., Quantization), and more
- We are active in the Electronic Design Automation (EDA) community, with strong academic presence, industrial collaboration, and international networking.
연구분야
Accelerator Design, Architecture and Tools for Emerging Technology (AI/ML, Processing-in-Memory, Cryptography), DNN Quantization
Accelerator Design, Architecture and Tools for Emerging Technology (AI/ML, Processing-in-Memory, Cryptography), DNN Quantization
연구 희망분야
Architecture and Tools for High-Performance Computing, Coarse-Grained Reconfigurable Architecture, Neuromorphic Systems, Quantum Computing
Architecture and Tools for High-Performance Computing, Coarse-Grained Reconfigurable Architecture, Neuromorphic Systems, Quantum Computing
연구주제
가속기 설계
이머징 기술을 위한 아키텍처 및 컴파일러
인공지능/기계학습 가속기
프로세싱-인-메모리
암호 가속기
내장형 기계학습 (네트워크 양자화)
Accelerator Design
Architecture and Tools for Emerging Technology
AI/ML Accelerator
Processing-in-Memory
Cryptography Accelerator
Embedded Machine Learning (e.g., DNN Quantization)
Accelerator Design
Architecture and Tools for Emerging Technology
AI/ML Accelerator
Processing-in-Memory
Cryptography Accelerator
Embedded Machine Learning (e.g., DNN Quantization)
국가연구개발사업 기술 분류체계
국가과학기술표준분류
ED. 전기/전자 > ED04. 반도체소자·시스템 > ED0407. 설계 Tool
논문
- Non-Uniform Step Size Quantization for Accurate Post-Training Quantization, Sangyun Oh, Hyeonuk Sim, Jounghyun Kim and Jongeun Lee, Proc. of European Conference on Computer Vision (ECCV), October, 2022.
- SparTANN: Sparse Training Accelerator for Neural Networks with Threshold-based Sparsification, Hyeonuk Sim, Jooyeon Choi and Jongeun Lee, Proc. of ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), August, 2020.
- Learning to Predict IR Drop with Effective Training for ReRAM-based Neural Network Hardware, Sugil Lee, Mohammed Fouda, Jongeun Lee, Ahmed Eltawil and Fadi Kurdahi, Proc. of the 57th Annual ACM/IEEE Design Automation Conference (DAC), July, 2020.
- Cost-effective Stochastic MAC Circuits for Deep Neural Networks, Hyeonuk Sim and Jongeun Lee, Neural Networks, 117, pp. 152-162, Elsevier, September, 2019.
특허
- 세밀한 정밀도 조정이 가능한 곱셈누적기, 이종은 외 1인, 대한민국 특허 10-2037043, 등록일 2019년 10월 22일.
- 반복 지수 양자화 기법 및 이를 이용한 딥뉴럴 네트워크 하드웨어 장치, 이종은 외 2인, 대한민국 및 미국 특허 출원중.